course: Master Project Virtual Prototyping of Embedded Systems
- teaching methods:
- responsible person:
- Prof. Dr.-Ing. Michael Hübner
- Prof. Dr.-Ing. Michael Hübner (ETIT), M. Sc. Florian Fricke (ETIT), M. Sc. Tomás Grimm (ETIT), Prof. Dr.-Ing. Michael Hübner (ETIT)
- offered in:
All statements pertaining to examination modalities (for the summer/winter term of 2020) are given with reservations. Changes due to new requirements from the university will be announced as soon as possible.
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The students master the design of “Embedded Systems” with the help of “Virtual Prototyping”. Besides using tools for modeling, simulation and analysis of a virtual “Embedded System”, the students will also be able to use SystemC, a hardware description language based on C++, and to model selected peripheral components. Furthermore they can implement applications in connection with the designed processor platform and a real-time operating system.
Within the project's scope, the methods of “Virtual Prototyping” are taught and reinforced with practical examples. The course's agenda is described below:
- Introduction to Virtual Prototyping basic concepts, systems, tools, languages, etc.
- SystemC basic course
This course is based on the IEEE SystemC TLM2.0 library, and aims to provide the basic understanding about the SystemC language and the Transaction-Level Modeling (TLM) standard.:
- Introduction to Transaction-Level Modeling
- Working with Loosely-Timed models
- Working with Approximately-Timed models
- Debugging methods
- Tensilica Processor design framework
The objective is to provide hands-on knowledge about the Cadence Xtensa Xplorer framework to design custom processor architectures based on the Xtensa LX series processors:
- Tensilica Processor Architecture
- Programming Cores with Tensilica Instruction Extensions
- Developing Software for Xtensa Processors
- Xtensa Debug and Trace
- Support for Emulation
- Virtual System Platform
This course uses the Cadence Virtual System Platform to integrate hardware and software platforms using fast processor models. The simulation platforms are based on SystemC/TLM2.0 models and allows for fast hardware emulation and early software development.
- Tool overview
- Selected examples
- Custom models design and analysis
- Fast processor models integration
- System-on-Chip ESL design
Basic programming knowledge in C/C++
Registration: Florian Fricke email: firstname.lastname@example.org Room: ID 1/323
The number of participants is limited. If the number of registrations exceeds the available capacity, the registrations are dealt with on a “first come, first served” basis.