Veranstaltung: Image processing on FPGAs

Nummer:
141141
Lehrform:
Vorlesung und Praxisübungen
Medienform:
rechnerbasierte Präsentation
Verantwortlicher:
Prof. Dr.-Ing. Michael Hübner
Dozent:
Prof. Donald Bailey (extern)
Sprache:
Englisch
SWS:
2
LP:
2
Angeboten im:

Prüfung

Termin nach Absprache mit dem Dozenten.

Prüfungsform:mündlich
Prüfungsanmeldung:None
Dauer:30min

Ziele

Objectives: - Show FPGAs and embedded systems especially for vision algorithms - Describe how parallelism within image processing can be efficiently exploited by FPGAs - Outline some of the differences between software based and hardware based image processing - Present practical algorithms for a range of image processing operations - Focus on low level operations - Give practical, hands-on, experience in programming vision algorithms using VHDL

Keywords: FPGAs as embedded systems; Register transfer level design using VHDL; Efficiently exploiting parallelism for implementing image processing algorithms; Implementation of basic image processing operations: camera control and image capture, point operations and colour, Bayer interpolation, histogram processing, linear and non-linear filters, geometric transformation, connected components processing, fast Fourier transform, JPEG based image coding.

Inhalt

This block course starts on June 12th and ends on July 6th. The lecture part will be on Monday, Tuesday and Wednesdays. Monday and Tuesday will be 2 hours lecture followed by a 1 hour hands on session. Wednesday will be a 3 hours hands on session.

FPGAs are increasingly being used as an implementation platform for real-time image processing applications because their structure is able to exploit spatial and temporal parallelism. Unfortunately, simply porting an algorithm onto an FPGA often gives disappointing results, because most image processing algorithms have been optimised for a serial processor. Therefore it is necessary to transform the algorithm to efficiently exploit the parallelism inherent within the algorithm. This course introduces a design approach for FPGA based imaging system development, highlighting the significant differences between hardware and software based design. While prior experience in image processing or FPGA based design is not essential, it would be helpful. The course will cover both the theory, and also provide practical hands on experience in applying FPGAs to implementing image processing algorithms. At the end of the course, participants should be familiar with the principles of efficient FPGA based design of image processing operations, and be in a position to begin using FPGAs within a range of image processing projects. A book with additional content is: D.G. Bailey, Design for embedded image processing on FPGAs. John Wiley and Sons (Asia) Pte. Ltd.: Singapore (2011) [doi:10.1002/9780470828519].

Voraussetzungen

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Empfohlene Vorkenntnisse

Experience with FPGA, HDL and Altera Quaertus Software (available for students for free)